Announcement

Collapse
No announcement yet.

OLED 1.7" 4DOLED-602817 RGB bus bits pattern and timing

Collapse
X
 
  • Filter
  • Time
  • Show
Clear All
new posts

  • OLED 1.7" 4DOLED-602817 RGB bus bits pattern and timing

    After reading the datasheet, I have a question:
    For the RGB interface, the pixel data is a 6-bit bus, and so it needs 3 DCLK cycles for a complete 18-bit one pixel. What is bit pattern of the bus, R[5:0], G[5:0], B[5:0], or some other patterns?
    For the Hsync and Vsync signals, is there any front and back porch timing, and what are the Hsync and Vsync total cycle times, or in other words, what are the horizon and vertical non display time specs?

    Regards,
    Brian

  • #2
    All this sort of thing is looked after by the on board SEPS525.

    So you need to read to read "4DOLED-602817 Init Codes" and "SEPS525 Chipset Datasheet" to understand how that works
    Mark

    Comment


    • #3
      Hi Mark,

      This is not an intelligent display with Graphic controller on board. This display has external RGB bus on the connector, and so I don't understand why you said the RGB interface was taken care by some chipset. I'm at a total lost here.

      Brian

      Comment


      • #4
        The chip mentioned is actually part of the display, refer to page 5 of display the datasheet.

        When using the display in RGB mode the data still goes into the SEPS525, refer to the block diagram on page 2 of the SEPS525 datasheet.

        Whilst the init codes will not be completely relevant to what you are wanting to do, they are not completely irrelevant either.

        Hopefully a full read of the relevant parts of the SEPS525 datasheet will help understand it a bit more.

        Mark

        Comment


        • #5
          So the SEPS525 has 18bit, or 16bit, or 6bit RGB interface bus. Both 18bit and 16bit intrfaces are most popular for working with other Graphic controller chips, but the odd ball 6bit interface required 3 DOTCLK cycles for one pixel -- I can't find any other graphic controllers doing this. Unfortunately this display manufacturer choose to provide only the 6bit RGB on the connector, a very rare species. I can't use this interface. I was initially interested to use the intelligent display with the Goldelox onboard, but the Goldelox is too slow: only can draw 10 frames per second at this resolution. I found a faster controller, RA8875, bit it doesn't have this odd 6-bit RGB interface.

          Brian

          Comment


          • #6
            Hmm, not sure why you say 6bit is oddball. the display is 262k colours, so if you do the math this is 6bit colour. (2^18).

            I presume you are meaning that your 'interface' supplies all 18 bits at once?

            If you can only do 8bits, then you are 'free' to ignore the lower 2 bits.
            Mark

            Comment


            • #7
              Hi Mark,

              Most graphic controllers use one DOTCLK cycle for one pixel, so for 16bit R(5) G(6) B(5) interface, the controllers output 16bit parallel at one DOTCLK. This is the most common interface. For 18bit panel, R5 and R0 connected together and the same for B5 and B0. Odd because this "6bit" interface actually display 18bit color per pixel, and it require a special kind of controller to output 3 data in 3 DOTCLK for ONE pixel. 3 dotclk for one pixel is odd.

              Comment


              • #8
                Yeah, understand, I always thought it was because an extra 12 wires coming out of such a small display would make the connector unweidly.
                Mark

                Comment

                Working...
                X