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4DPi-32 Electrical Questions

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  • 4DPi-32 Electrical Questions


    I am wanting to back power the 4DPi-32 display and Raspberry Pi 2 through the two 5V headers. I am aware of the risk, it will be properly regulated and fuse protected. I'd like to know what trace widths are used between the P1 and P2 headers so that I can be assured that it will handle ~2.5A. In addition to this, I see that the Xilinx and touch controller are powered by 3.3V. This will of course come back from the Pi, do you see any issues with this power route?

    Thank you
    Last edited by k3nt; 16 April 2015, 06:42 AM.

  • #2

    On 4DPi-32 Rev 1.3 hardware, the trace between P1 and P2 on the 5V bus, is 1.5mm, copper is 1oz thickness. It however goes from Top layer, to a mid layer and back to top layer, so there may be some loss of capacity by doing this.
    Powering it this way, if protected, I dont see being a problem. This would power the Pi and the display, and then the display would be backfed with 3.3V as per normal to power the Xilinx.
    It should be OK, at an educated guess - however never tested.



    • #3
      Thank you very much for the response!

      I'll be sure to report back, hopefully minus any smoke.


      • #4
        Apologies for re-opening this, in need of a little more information so I can confirm the load will be ok. Are there two separate traces for both pin #2 & #4, or are those pins bridged and sharing a single trace? If they are sharing a single trace, then the internal trace would need to be more like 110mil or greater to handle 2.5A.

        Thanks again


        • #5
          Hello again

          The two pins are bridged and share the single trace mentioned.
          As mentioned, it was never designed to do what you are doing.